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CircuitDesign::to_props

cre8_app_circuit::designs::CircuitDesign::to_props

method · cre8-app-circuit · crates/cre8-app-circuit/src/designs.rs:165

7lines
2cyclomatic
1max nesting
4statements
0? exits
1params
2callers
1callees
0.9 (p72)call-graph weight

Crystal

no crystal was derived for this function

Call neighbourhood

Callers left, callees right, two hops each way (2 direct callers, 1 direct callees; the heaviest shown). Dashed edges are method calls resolved by name alone.

name · 1 sitename · 1 sitename · 1 sitemethod · 1 sitemethod · 2 sitesmethod · 1 siteself · 1 siteself · 1 siteself · 1 siteself · 1 sitedesign_from_verilog_with_ta…app-circuit · cc 6cre8_app_circuit::designs::design_from_verilog_with_targetrecord_asicapp-circuit · cc 1cre8_app_circuit::designs::record_asicrecord_simulationapp-circuit · cc 1cre8_app_circuit::designs::record_simulationsave_designapp-circuit · cc 1cre8_app_circuit::designs::save_designdesign_props_round_tripapp-circuit · cc 1cre8_app_circuit::designs::tests::design_props_round_tripCircuitDesign::to_propsapp-circuit · cc 2cre8_app_circuit::designs::CircuitDesign::to_propsCircuitDesign::detailapp-circuit · cc 3cre8_app_circuit::designs::CircuitDesign::detailCircuitDesign::atlas_frameapp-circuit · cc 1cre8_app_circuit::designs::CircuitDesign::atlas_frameCircuitDesign::summaryapp-circuit · cc 1cre8_app_circuit::designs::CircuitDesign::summary

Control flow

Source not readable from this process.

Callers 2

Callees 1

Source not readable from this process.